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How to reduce DC-link capacitor current stress?

Therefore, for the voltage vector V 45, the DC-link current consequently could express with I d c = i A − i E. Basic on this, the DC-link capacitor current stress could be reduced by rearranging the voltage vector with the proposed optimal switching sequence control method.

Why is capacitor current reduction important for traction inverters?

Therefore, capacitor current reduction is of great importance to enhance the reliability and power density of traction inverters.

Does DC-link capacitor current pressure reduction affect current THD?

The proposed method has a slight effect on the current THD, resulting in lower capacitor current ripple and high drive reliability. The DC-link capacitor current pressure reduction tests are carried out on a 3 kW DTPMSM drive.

How can interleaving modulation reduce DC-link capacitor current ripple?

The interleaving modulation method can make the overlap time for the active vector reduction, which can mitigate the DC-link capacitor current ripple. In order to make sure that the reference voltage is unchanged, the duration for each vector must keep unchanged.

What is the average DC-link capacitor current ripple?

The average DC-link capacitor current ripple is reduced to about 10 A with the proposed method. It is noteworthy that the DC-link current ripple is reduced further to about 3 A such as the region M and N, shown in Fig. 12 (c). The performance in mitigating the DC-link current ripple is much better than the interleaving method.

Can a capacitor current be suppressed?

It can be concluded that the RMS of the capacitor current can be suppressed under any operating condition with a maximum reduction of 74.46%. The maximum capacitor current RMS is decreased by 44.51%. In addition, the maximum peak capacitor current is suppressed from 42.9 to 28.8 A.

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